Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5

	Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5(divagr.com)
	584 points by csmantle 13 hours ago \| 118 comments
	tl;dr: A researcher compiled a working 32-bit RISC-V CPU (RV32IM) directly into the weights of Qwen 3.5 4B by exploiting Gated DeltaNet layers as exact, addressable RAM—no training, tools, or external sandbox involved. The CPU runs during the model's forward passes, executes C and MicroPython, passes official riscv-tests, and boosts arithmetic benchmarks to parity with giving Qwen a Python tool (e.g., NUPA long-integer from 48.6% to 100%). The author also added an in-weight filesystem persisting across conversations, and suggests the technique as a testbed for AI safety research on hidden reasoning and tamper-proof monitoring.
	HN Discussion: ↑Playful concern about AI safety implications of hiding a CPU and filesystem inside model weights ↑Draws analogies to biological computing, seeing this as closer to brain-like substrates than silicon ↑Fascination and curiosity about the technical mechanism of using DeltaNet state as RAM •Points to related prior work doing similar in-transformer computation experiments ↑Interest in extending the approach, e.g., to scratch-trained models or parameter-efficient benchmarks