tl;dr: A research project by Christopher Domas that inverts typical performance analysis by hunting for the slowest possible execution of a single x86 instruction. The current champion is `fxrstor64` at 62 seconds (~198 billion cycles), achieved by loading 512 bytes of FPU state from high-latency PCIe MMIO while other cores saturate the fabric with contending non-posted transactions. The leaderboard ranks 27 instructions from `nop` (1 cycle) up through microcode assists, split locks, `wbinvd`, and MMIO-abused vector loads, with ARM and RISC-V boards still open.